by Sanjay Challa, NI
Software defined radio (SDR) is the standard used to evaluate new designs with real-world signals and conditions, but existing software tools for SDRs impede innovation today. There is another way.
As we share more data across our networks and look forward to more connected devices that offer the promise of a better standard of living, our technology approaches must scale to support this evolution.
Today’s shortage of effective prototyping tools for researchers evaluating new designs with real-world signals is alarming. Worse yet, new 5G research areas require more from a system design perspective, which creates substantial demand for design tools and processes that promote efficiency.
Though software defined radio (SDR) is the de facto standard across laboratories in industry, academia and government for evaluating new designs with real-world signals and conditions, existing software tools for SDRs impede innovation today. These tools are not system oriented and lead to a disjointed, indirect design flow. In large part, the challenge emerges from the discontinuity between tools well suited for algorithm design and those required to program the hardware components of an SDR. The LabVIEW Communications System Design Suite can bridge this gap by providing a unified design flow from algorithm to hardware.
SDRs offer flexibility that helps designers rapidly prototype. This flexibility stems primarily from computing elements that dictate the behavior of the generic, wide-bandwidth RF front end on modern SDRs: multicore processors and large, user-programmable FPGAs. Traditional tools for programming the processor and FPGA on SDRs present a barrier to rapid prototyping, though. Changing from algorithm to implementation on a processor and an FPGA demands different specializations and tools. Design teams on the bleeding edge of various technology vectors involve too many people and engage in long and costly design cycles. The result isn’t a smooth, iterative prototyping process that contributes to innovation; instead, the process hinders efficiency and innovation.
Existing 5G research vectors require the use of modern SDRs that incorporate a processor and an FPGA to rapidly prototype. The goal for 5G research is to increase network capacity by 1,000 times by 2020. Key vectors include millimeter wave (mmWave) bands; Massive multiple input, multiple output (MIMO) technology; new waveforms; and small cell research. For some research vectors, such as Massive MIMO, the requirements extend far beyond design tools and hardware options that simply enable access to the processor and FPGA on a single SDR.
Massive MIMO involves the use of many antennas working together at a lower power to better serve a larger base of user devices. This means prototyping a Massive MIMO design can involve dozens of individual SDRs that need to work in parallel.
Lund University has collaborated with NI to develop the world’s first 100-antenna Massive MIMO system (Figure 2). The Lund application coordinates 50 USRP RIO SDRs, which requires strict timing, triggering and synchronization, as well as design tools that can operate at scale so the design team can manipulate the prototype at a system level.
Though some tools and technologies enable synchronization or offer an effective design experience for the processor or FPGA, no solutions on the market provide a scalable, reasonable design platform for Massive MIMO. Unlike traditional approaches, LabVIEW Communications, the LTE and WiFi application frameworks, and NI SDR hardware form an integrated system-level design. This platform-based system offers the scalability and control needed for experiments such as Lund University’s 100-antenna Massive MIMO system, which has been subsequently replicated by various industry and academic groups.
The benefits of this platform are: open-source IP, system-based unified design flow and an advanced FPGA compiler.
LabVIEW Communications simplifies the prototyping experience with application frameworks that provide a proven starting point. These frameworks are comprised of documented, modifiable, standards-based source code for LTE and 802.11 PHYs. This unique combination enables designers to focus on the specific components they want to improve in their existing LTE and 802.11 designs instead of spending time building the requisite infrastructure they need to properly test the novel algorithms.
System-based unified design flow
LabVIEW Communications integrates the once-disparate design process into a system-based unified design flow for communications system prototyping. It delivers a single, cohesive design environment that can target both the processor and FPGA. This hardware-aware design environment includes SystemDesigner, which designers can use to validate system setup, access system documentation, describe the system architecture, configure system components and partition and deploy algorithms to hardware. This hardware-software integration also provides access to I/O, clocks, triggers and resources to eliminate the need for middleware and driver development.
Advanced FPGA compiler
The advanced FPGA compiler technology in this program enhances flexibility by simplifying how algorithms are described and subsequently mapped to the SDR hardware. To develop signal processing algorithms, designers can use the included multirate diagram to connect processes that run at different rates without the burden of handshaking, buffering and queuing data between processes. Once they design the signal chain in a multirate diagram, designers can rely on a built-in, interactive, data-driven tool to convert the design to a fixed point and then explore how the design performs given different requirements. Simply defining a clock rate and a throughput for the algorithm allows the underlying compiler to analyze the implementation and provide timing and resource estimates specific to the SDR hardware the designers wish to deploy to.
There’s a better way
With these tools, designers no longer need to know about the underlying deployment hardware architecture or to manually dissect a design to understand the trade-offs between different implementations. The compiler automatically explores the impact of unrolling loops and then partitions memory, modifies memory access schemes and selects different FPGA resources/components. Designers can move forward with the implementations that best suit their design requirements based on the feedback from the compiler. As an added benefit, designers can achieve considerable reuse because the core algorithms are defined in higher-level languages, and the implementation is derived from the design requirements that are imposed on the algorithm.
Today’s system designers require a design flow that realizes the true potential of SDRs for rapid prototyping. New and demanding 5G research vectors require tools that can surpass a design flow for a single SDR to offer a design flow for a system that comprises hundreds of SDRs. Designers need access to intuitive, high-level languages that enable efficient algorithm design and system abstraction without sacrificing low-level interfaces for optimization. Furthermore, designers need hardware-aware software design tools to achieve accurate, real-world I/O, clock and resource integration at a system level for new research vectors like Massive MIMO. The combination of LabVIEW Communications System Design Suite, the LTE and WiFi application frameworks, and NI SDR hardware provides a much-needed system-based platform for developing algorithms into prototypes and helping designers innovate faster.
NI (National Instruments)
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