In 2007, two Applied Materials scientists developed a hybrid-module solar concept and brought it to commercialization. They coupled several materials designated for solar while implementing semiconductor properties and using production methods from flat-panel display industries. None of the materials used are new, but they have been packaged together to create a higher performance device.The hybrid concept is based upon Triex technology, which focuses on three areas: Conversion efficiency, module costs and low temperature coefficients (kWhr/kWp). Silevo builds PV modules from wafers that have been sliced by the manufacturer. The company’s first approach in its PV cell development was to purchase finished, phosphene-doped n-type wafers. To achieve a phosphene-doped wafer, monosilicon ingot growth occurs. To produce the emitter in PV cells, the company uses a doped amorphous silicon (a-Si) and a thin, thermal-oxide step, instead of Cadmium Telluride (CdTe). The device is a P-O- I -O-N, with a symmetric look. Researchers chose an n-type substrate rather than a p-type substrate because the n-type has two advantages. First, when increasing the minority life carrier (MLC) in PV cells, the n-type can produce higher MCL, leading to high conversion efficiencies. Second, boron doping (a requirement for p-type) usually creates a light-induced degradation (LID) effect, resulting in cells/panels that can decay 2 to 3% when initially exposed to sunlight. Conversely, an n-type wafer-infused substrate with phosphene, does not experience LID. Silevo has demonstrated 22.1% conversion efficiency at a cell level, as validated by Sandia National Labs, making it one of the highest energy densities in the industry.
Once the substrate type was chosen, two critical aspects of the wafers were considered: The minority carrier lifetimes (MCL) and the bulk resistivity of the material. The wafer process has wide specifications when it comes to the requirement for MCL (the speed at which there is a recombination of electrons whole pairs). In most cases, the higher the MCL, the higher the performance, but the wafer becomes more costly. To Silevo’s advantage, it does not require an aggressive specification for wafers as others do; therefore, a lower-cost wafer can be sourced.
Seeking to keep a lower-cost PV cell, Silevo’s researchers discovered that copper (Cu) possessed two attributes that make it a better solar material than silver (Ag): lower resistivity at a lower temperature process and cost-effectiveness. Module manufacturers that use crystalline silicon (c-Si) technologies use Ag nanopastes to create its own metal electrode/contact system. To remove resistivity in Ag, the temperature in Ag has to be raised or the thickness needs to be increased. To enable higher conversion efficiencies with highly resistive films, PV competitors use three busbars to conduct current out of the cell. The busbars are packed close together to overcome resistivity challenges of Ag metallization. Because Silevo’s devices uses copper, lowering resistivity allows a reduction in the number of busbars required to conduct current out of the device.
Eliminating busbars reduces shading of the active device and loss in conversion efficiency, while allowing deposits to lower film thicknesses that reduce material consumption.
Inasmuch, the rise in Ag price has doubled over the past two years. Because Ag costs became the second largest cost component of standard c-Si technology, replacing Ag with the use of electroplating Cu saves 70% on metallization costs based on $40/oz spot Ag costs. In other words, the cost of Ag metallization scheme is about $0.12/Wp versus a Cu approach, which is $0.03/Wp.
Some companies have attempted Cu-based cells previously, but have been unsuccessful. There are two challenges with using copper: Diffusion and adhesion. If Cu diffuses into the silicon substrate, there is a high likelihood of destroying the material. Thus, there will be no MCL, and recombination will be immediate. Adhesion is the event when Cu is peeled off. To prevent any Cu diffusion into the substrate, create good adhesion between the Cu material and the underlying substrate, Silevo deposits a blanket film barrier and seed layer into its device. The company learned that coupling tunneling oxide with a doped a-Si formed a layer to the emitter. This reaction reduced temperature coefficients and produced high voltages.
Filed Under: Design World articles, Green engineering