The LS7366R is an Integrated Circuit for decoding and counting quadrature clocks directly from Incremental Encoders. It tracks at 40×106/sec line rate (at 5 V) from the encoder and a count limit of 232. Its serial interface (SPI) reduces the required IO wire count. It can also operate with non-quadrature clock signals and provides various counting modes for signal conditioning. The LS7366R operates over the voltage range of 3 V to 5.5 V.
Programming and all communications are made with four simple instructions: READ_reg, WRITE_reg, LOAD_reg and CLEAR_reg. The functional modes are controlled with two bytes of data written into two on-chip Mode Registers. It is offered in 14-Pin DIP, SOIC and TSSOP packages.
LSI Computer Systems, Inc.
www.lsicsi.com
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Filed Under: Electronics • electrical
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