At the HiPEAC 2013 conference in Berlin, KALRAY demonstrated MPPA256, the world’s first supercomputer-on-a-chip, consisting of 256 computing cores. This innovative processor combines the ultimate in several processor types and will enable a whole new class of embedded and industrial applications in the fields of image processing, signal processing, control, communications and data security. The MPPA256 is completely designed in Europe and is only one of the success stories resulting from the 170 million Euro investment in carefully selected European funded research projects over the past 6 years.
“The MPPA256 combines the benefits of high processing power (500 billion operations per second), low power consumption and high-level programming, and it is the first highly scalable multi-core processor that can also execute real-time applications and is therefore perfectly suited for mixed criticalities systems” stated Benoit Dupont de Dinechin Director of Software Development at KALRAY and one of the main architects of the chip.
KALRAY announced its new product at HiPEAC 2013, a conference that brought together more than 500 delegates from all over the world for three days packed with more than 40 events. “The HiPEAC conference is currently the premier computing systems event in Europe” said Professor Ben Juurlink from the Technical University of Berlin, general chairman of the conference. HiPEAC, the European Network of Excellence on High Performance and Embedded Architecture and Compilation, is geared towards advancing the level of research in this field and stimulating the collaboration between academia and industry, and between computer architects and tool builders. The next HiPEAC conference will take place in Vienna, January 20 to 22, 2014.
For more information visit www.hipeac.net.
Filed Under: Rapid prototyping
