Digital signal processing circuitry is widely preferred over analog today, mostly because of its relative insensitivity to parameter drift and direct compatibility with computer systems. One notable exception, however, is in signal conditioning circuits for sensors that still operate in the analog world. Analog-to-digital converters (ADCs) typically follow these conditioners and connect the analog to the digital domain.
Modern ADC circuits are extremely dense, which come from recent advances in IC manufacturing techniques where conductor paths are measured in sub-microns. In many cases, this high density lets certain types of ADC circuits sit inside other multiple-function or custom, dedicated application packages.
As a result, nearly all communications networks, test and measurement equipment, process controllers, instruments, audio and video signal processors, and automotive engine controls operate at higher speeds, accuracy, and reliability based on digital techniques. For example,microprocessor controls are indispensable for automobile fuel and air management systems because they provide the only practical means of meeting mandated fuel economy and emissions standards.
Selecting ADCs
Considering the variety and price range of available ADCs, finding the best one for a job often is not an easy task. The first step translates system requirements into ADC specifications for speed, resolution, accuracy, linearity, stability, and microprocessor compatibility. Next, the sampling rate is selected to determine the acquisition speed. To preserve all the sampled information in an analog-to-digital conversion, the Nyquist sampling rule states that two or more samples of the input are required during one complete cycle of the digitized signal. That is, the sampling frequency must be at least twice the maximum frequency of the measured signal.
Because resolution and accuracy are so closely related, they are often confused. Resolution is represented by the number of bits in the digital output word. It defines the smallest input change needed to increment the output by one digit. This represents a change in the converter’s least significant bit, LSB. Accuracy can be the same, lower, or higher than the resolution. Also expressed in LSB, accuracy depends on the integral and differential nonlinearity of the converter.
Integral nonlinearity indicates how distant (how many LSBs) the digital code is from an ideal value. It encompasses the entire transfer function. Differential nonlinearity represents the variation in the width of the code from a single LSB. When differential nonlinearity is greater than one LSB, some codes may be inadvertently skipped (called a missing code). ADC specifications that state they will not produce a missing code guarantee the differential nonlinearity is less than one LSB. ADC stability deals with variations in parameters with respect to temperature, time, humidity, and other environmental factors.
Integrating ADCs come in single, dual, triple, and quad slope versions. Dual slope ADCs are the most widely used and provide high resolution measurements with superior noise rejection. They integrate upward from an unknown voltage and then integrate downward with a known source voltage.
All ADCs can be classified in one of two major groups; stand-alone and microprocessor compatible. Stand-alone ADCs often contain LCD or LED drivers and can be directly connected to a digital display. Usually, however, they cannot be connected to microprocessors or other digital circuits. One of the most widely used stand-alone ADCs is a 3½-digit ADC with direct LCD display drivers. This IC is available from several chip makers and continues to be used for panel meters and digital test equipment.
When an ADC is used for process control or data acquisition systems where data must be fed to computers or dedicated microprocessor systems, it must be microprocessor compatible. Typical resolution values for microprocessor compatible ADCs are 8, 10, 12, 14, and 16 bits. However, 18, 20, and 24-bit resolution ADCs are also available. The ADC can have a single channel or have multiple channels, and inputs can be single ended or differential. Typical microprocessor interfaces are parallel, serial, SPI and I2C.
ADC technologies
ADCs are built around three basic technologies: monolithic, hybrid, and modular. A possible fourth technique, not necessarily considered a technology, is an ADC on a PC card.
Monolithic ADCs: The number of functions packed into a single ADC is continuously increasing with improvements in speed, accuracy, and resolution. Internal reference voltages, clock oscillators, and track-and-hold amplifiers are built into modern monolithic ADCs. Earlier monolithic ADCs were mostly bipolar, but they have moved largely to CMOS technology because they require less power, have increased circuit density, and can use thin-film resistors for better accuracy. However, bipolar and CMOS circuitry are also available on one chip called BiCMOS.
Hybrid ADCs: At one time, it was thought that hybrid ADCs would disappear as more advanced monolithic converters were introduced. But some manufacturers continue to include monolithic chips in new hybrid multichip circuits that have superior specifications.
Modular/Card ADCs: Modular or card ADCs can still provide accuracy, speed, and additional features not available in other technologies. Modular converters use monolithic ICs and hybrid packages made from monolithic chips. Here, discrete components are attached to small PC boards that are then encapsulated in metal packages. Modular and card ADCs are made for specific applications where one or more intrinsic parameters must be held to extremely close tolerances. Consequently, they are typically more expensive than the other types.
Modules can accommodate features that are difficult to implement in hybrid or monolithic parts. Also, passive components can be included in modules that are not otherwise possible. For example, wire-wound or bulk metal resistors may be used that have higher accuracy and better long-term stability than monolithic or hybrid parts.
ADC architectures
The five most widely used ADC architectures today are integrating, successive approximation, flash, pipeline, and delta-sigma converters. Each architecture has advantages and limitations that make one better than another for a specific product.
Integrating converters: These converters are frequently used where high resolution and high noise immunity are important. The resolution is often represented in ± counts and typically will be in the 2000 count to 40,000 count range, but conversion speed can be from 1 to 100 times per sec. When high resolution, slow conversion speed, and good noise immunity are required, they deserve consideration. The most widely used integrating ADC is called a dual slope converter, a considerable improvement over the earlier single-slope version. The selection of components for the integrator and oscillator in a dual slope converter is much less critical than for the single-slope unit.
The integrating converter integrates the input signal over a specified time, which results in excellent noise rejection. During integration, noise spikes are averaged to zero and do not influence the output reading. This feature is particularly important in industrial environments where sensors are located some distance from ADC inputs and are in the presence of high EMI and RFI fields. Integrating ADCs also have good linearity, and do not miss codes because counts are generated internally.
Autozeroing, performed before every execution, is a standard feature. Before each conversion, the sum of internal offset voltages within the converter are stored, and then used for compensation later in the cycle. Autozeroing is not usually on either successive approximation or flash converters because it is difficult to implement.
This ADC is unusual because it contains a DAC, comparator, and a logic circuit. The logic circuit sets the DAC to midscale and the comparator compares the input signal to the DAC output. Depending upon the value of the input, the MSB is set to either one or zero. Comparing continues until all the bits are set (including the LSB) and the value reaches that of the measured input voltage. After the conversion completes, the final number is stored in the successive approximation register.
As an example of using an integrating ADC, consider an installation needing a precision furnace temperature control system. The highest measured temperature is specified at 1000°F, and the accuracy is 0.1°F. A thermocouple amplifier produces 1 mV/°F. A microprocessor is selected to compensate for thermocouple nonlinearity in software and to execute the process control algorithm.
A 4½ digit BCD-output, integrating ADC is selected as a candidate. The ADC has an output range of 0 to ±19999. This allows measurements within 0.1°F. The maximum specified temperature is only 1000.0°F, but the converter circuit can handle up to 1999.9°F without increasing cost or sacrificing accuracy. Accuracy is guaranteed to ±1 count over the specified range, and a zero reading is guaranteed for 0-V input.
Successive-approximation converters: When comparing conversion speed, these ADCs are midway between integrating converters at the low end, and flash converters at the high end. Successive approximation ADCs combine high resolution, high speed, and simple microprocessor interfacing. But their liabilities include less noise immunity and lower resolution than integrating or the delta-sigma ADCs. Also, they are slower than flash or pipeline converters.
A wide variety of resolutions, speeds, and other features is available from ADC suppliers. Resolutions range from 8 to 18 bits and the sampling rate is typically in the tens and hundreds of kSPS (kilo samples per second). Select devices approach 10 MSPS speed.
An ADC with 8-bit resolution means that the digital code changes from 0 to 256 when the analog input voltage changes from 0 to full scale. For example, to digitize the output signal from a sensor that varies from 0 to 5 V, the smallest input increment the ADC can resolve is 5/256 = 0.0195 V or 19.5 mV. This is quite acceptable for many process-control applications. If more resolution is required, however, an ADC with more than 8-bits is needed. For example, an ADC with a 14-bit resolution will have a total of 16,384 steps so the smallest voltage increment it can distinguish is 5/16384 = 0.0003051 V or 0.3051 mV.
Digitizing ac and rapidly changing dc signals with any amount of precision requires special consideration of signal slew rate. For example, a successive-approximation ADC may have a conversion time of 10 µs. So the sample rate can be as high as 100 kHz. It takes the ADC almost 10-µs to complete the conversion. If the input signal is varying too rapidly, the initial value at the end of the conversion will change. Since ADC input signals must not change more than ½LSB during the conversion time for most accurate digitizing the highest input signal frequency should be significantly limited.
To measure higher frequency signals, a sample-and-hold (S/H) or track-and-hold amplifier is commonly used. The S/H amplifier is placed ahead of the ADC to hold the input analog voltage steady during conversion. Applications for this ADC include audio and video conversion, digital
signal processing, and high-speed data acquisition.
Flash ADCs are the fastest converters of all the types described. But they also use the largest number of circuits, easily in the hundreds, because of their parallel-circuit architecture.
Flash converters: Flash converters, sometimes called parallel converters, are the fastest and least complex. The whole conversion process is completed in just one cycle, with rates over 500 million samples/s.
Flash converters are usually limited to 8-bits. The main reason is the large number of comparators needed for this architecture. Flash converters use 2n-1 comparators, where n = number of bits. An 8-bit flash ADC has 255 comparators. Today, this architecture is used mostly as a building block of the pipeline or sub-ranging architecture. Very few true flash devices are produced.
Pipeline converters: To overcome the limitation in number of bits, a sub-ranging or pipeline ADC was developed that sacrifices some speed for resolution. These converters require two or more passes to complete a conversion, which obviously slows them compared to full-flash converters. But the total number of comparators needed is greatly reduced. The resolution of pipeline converters is typically 16 bits, with sample rates over 100 MSPS.
Delta-Sigma converters: A delta-sigma (or sigma-delta) ADC is a special type of an integrating ADC. The ADC package contains an integrator, a digital-to-analog converter (DAC), a comparator, and a summing junction. These ADCs are relatively inexpensive because the DAC is only single-bit, but they employ oversampling to obtain high-resolution measurements. The ADC works best with input signals of only a few kHz, but it has better noise rejection than other types and users have control over the integration time.
Delta-sigma integrating ADCs have both high resolution and exceptional noise rejection. They work especially well for relatively low-frequency (a few kHz) measurements and reject high frequency noise.
Delta-sigma ADCs can process extremely low-level signals, use little signal conditioning circuitry, and don’t require calibration or trimming. The DAC handles this requirement. They also contain a digital filter so they can operate at a high oversampling rate without a separate anti-aliasing filter at the input. Delta-sigma ADCs come in 16 to 24-bit resolutions, and they are suitable for most data acquisition and instrument applications.
A detailed discussion concerning the principle of operation of each of these ADCs is beyond the scope of this article. However, you may find additional design information, handbooks, samples, and evaluation modules from the websites of data acquisition system manufacturers and integrated circuit makers such as:
IOtech, Inc.
www.iotech.com
National Semiconductor
www.national.com
Analog Devices
www.analogdevices.com
Texas Instruments
www.ti.com
National Instruments
www.ni.com
ADC noise histograms
Often, ADC manufacturers run a code-density test on a particular converter to check its accuracy and the influence of internal non-linearities. They apply a sine-wave signal with precision amplitude and frequency, generate a manageable distribution of output code, and then analyze this output with a histogram. If it were possible to make an ideal ADC, it would generate only one output vertical bar for a single input frequency and amplitude, because only one value could be measured for each sample. But all real ADCs contain some non-linearity, so they generate a Gaussian distribution set of bars on either side of the center frequency which represent digital words sorted into different code bins. Each bin is labeled for a single digital output code and contains a count of the number of times that the code appeared in the output. When n equals the ADC’s resolution, 2n bits are needed. The width of each code bin is ideally FSR/2n where FSR represents the full-scale range of the converter. The probability density function is determined from this data. But a large number of samples must be taken, depending on the ADC’s bit size for the histogram test to be meaningful. The number of bits in the ADC is directly proportional to the number of samples required, which could be 500,000.
Filed Under: Converters (electrical) AD + DA • transformers, Semiconductor manufacture, ELECTRONICS • ELECTRICAL
a very good information but if u add some vhdl code based on some application then it will be too useful thank you for the info