Gallium nitride (GaN) is a vital piece of technology with reaching influence in a variety of fields, including cosmic operations. Recently, imec and its partners Thales Alenia Space have uncovered promising results for future space-based technology.
Specifically, no degradation was recorded after intense neutron and ion irradiation using imec’s 200mm gallium nitride-on-silicon (GaN-on-Si) e-mode power devices with a p-GaN gate architecture. Always looking towards pushing innovation forward, these results show exciting advancements for power conversion conducted beyond Earth.
Below you’ll find a Q&A between ECN and Steve Stoffels, Project Manager and Device Engineer at imec, regarding this announcement.
ECN: In general, why is GaN technology important for space-based applications?
Stoffels: GaN components can switch faster compared to Si components. The advantage of this, is that for a faster switching system the passives can be much smaller, i.e. the total size of the system solution can be reduced. For space missions, weight is a premium cost since launch costs per kg are extremely high, thus any savings in the launch weight are very important for space missions.
A GaN component can also be operated at higher temperatures compared to silicon. Due to its higher bandgap, one can guarantee a good device isolation up until higher temperatures compared to Si. This is important for space missions as again launch weight can be reduced by using simpler cooling solutions.
Apart from the launch weight, GaN is also a very interesting technology to increase robustness of power electronic components for space applications. GaN has a high bandgap and moreover the atoms are more tightly bound with respect to silicon, which has been until now the technology of choice for spaced-based electronics and power components. This means that the technology is much more robust against displacement damage, i.e. it is more difficult to knock an atom out of the GaN lattice, compared to one out of the silicon lattice.
Secondly, due to its wide bandgap, the amount of electron/holes which is generated during an ionizing event is lower, i.e. it costs more energy to generate an electron/hole pair in GaN than it is in silicon, so this will reduce the sensitivity of GaN towards ionizing radiation.
ECN: What limitations did the first-generation of GaN-based power devices exhibit?
Stoffels: Many of the initial processes for GaN used Au-based metallization which are not allowed in a CMOS compatible fab and thus required dedicated or small scale process lines, which does not allow to leverage the benefit of scale and throughput of an industrial scale silicon line. With respect to architecture, first generation GaN-based power devices were mainly depletion mode devices with an insulated gate.
Different than for silicon components, the channel in a GaN device is formed by spontaneous and piezoelectric polarization and is naturally present in the devices. This means that the natural operation of the component is depletion mode, i.e. the channel will be switched on when a zero-volt gate bias is applied. This can cause added problems for system designers, as in the case of gate driver failure the device will switch on, causing catastrophic failure of the system unless special precautions are taken, e.g. by cascoding a GaN device with a second silicon normally-off device. This second Si device can cause extra reliability issues when used in space, as Si is less hard to radiation compared to GaN. Moreover, the cost of rad-hard Si components is quite high and will add significantly to the cost of the system.
For a depletion mode architecture, the gate will be at the lowest potential (due to the negative gate bias). In space, when a depletion mode device is hit by an ion, electron-hole pairs will be generated and the holes will be attracted to the gate, where they will accumulate, causing switching events and gate rupture. These events and gate rupture have been observed by imec in earlier work on depletion mode devices.
Also, most first generation devices were mainly fabricated on 150mm substrates. Industry focuses first on smaller wafer sizes as the process is easier to setup and they can achieve a quicker return on investment. The difficulty of scaling to higher wafer sizes stems from the fact that GaN is grown heteroepitaxially on silicon. This has the advantage that a cheap carrier substrate (Si) can be used, as native bulk GaN substrates are prohibitively expensive and only available on very small wafer sizes. The downside of the heteroepitaxial growth is that GaN does not have a perfect lattice match or thermal expansion coefficient (CTE) match towards the Si carrier substrate. Due to this many defects are present in the GaN layer, which can degrade device performance.
Moreover, the bow and stress control becomes very important parameters to control. Over the years, many optimizations have performed to improve device performance and reliability of GaN-on-Si components, even in the presence of these defects. And devices have reached a level of maturity that they can be introduced in the market.
ECN: How does the next-gen, 200mm GaN-on-Si platform improve upon previous iterations?
Stoffels: The next-gen 200mm GaN-on-Si platform improves on previous iterations as it is implemented in a CMOS compatible pilot line, using gold-free processes and can thus be run together with existing technology platforms. The technology developed in the pilot line is industrially based and can be used by manufacturers for terrestrial applications, such as automotive and avionics. For such a pilot line, cost and CMOS compatibility are very important.
The demonstration of the radiation robustness of the GaN technology developed in this pilot line is an important milestone as it allows GaN power components for space to leverage the cost, maturity, and reliability advantage that such a platform offers. Whereas for silicon, typically high additional costs were needed to qualify the components for space.
Imec has focused on setting up a 200mm platform focused on e-mode devices. The 200mm CMOS compatible technology allows to significantly reduce the cost of the technology, as due to the larger wafer size more devices can be processed on a single wafer.
Moreover, the highly automated tools of a 200mm CMOS line can be reused and processes can be run in parallel with existing silicon processes, cutting the initial investment and improving the efficiency of the process. Scaling the technology to 200mm is a non-trivial matter in the case of GaN-on-Si. Due to the aforementioned heteroepitaxial growth the bow control of 200mm wafers is much more challenging compared to 150mm wafers.
Imec has performed pioneering work in this field to demonstrate the feasibility of a 200mm GaN-on-Si e-mode technology. Imec has demonstrated GaN-on-Si buffer for device operation until 650V and has recently pushed this until 900V at room temperature, which is state of the art even compared to 150mm wafer sizes. This pioneering work is essential to give industry confidence to move to 200mm technology for next-generation devices.
Apart from this evolutionary work on GaN-on-Si, imec is also performing more revolutionary work on novel substrate types which can significantly increase the operational voltage range of GaN-based devices, enabling new applications and new device topologies. Imec is also performing pioneering work on monolithic integration of half bridges on a single die, thus increasing the integration level of GaN components which can help to further reduce the cost of the technology.
ECN: Why must electronics used in space applications employ high levels of robustness?
Stoffels: Space is a very demanding environment for electronic components. In space there are many highly energetic particles present, which can be ionizing (ions, positrons, etc.) or purely energetic, as in the case of a neutral particle like a neutron. While the flux of these particles is fairly low, the change of such a particle to strike over the lifetime of component in space is significant. When such an element strikes it can cause lattice damage, i.e. displacement of atoms in the lattice, leading to defects and dislocations in the component degrading the overall device performance.
When the radiation is ionizing, there will additionally be electron/hole pairs generated in the material. Since the device is in operational conditions, there will typically be electrical fields present which attract the charges to one of the terminals. This can cause, for example, parasitic switching events where the device partially turns on during high electric field operation. If such an event occurs, the device can heat up significantly and be damaged. On top of that, charges can get trapped in the dielectrics, e.g. in the gate dielectric, which can lead to gate rupture characterized by an increased leakage current.
Space is a critical environment as components cannot be readily replaced or are very costly and dangerous to replace, since a dedicated space mission will need to be planned to replace the failed component. Therefore, it is essential that the lifetime and reliability of the component need to be guaranteed over the entire duration of the mission and one needs to make sure that the device parameters do not drift out of spec during the mission lifetime, which can be in excess of 10-20 years (or even longer if one looks at Voyager, which is already in space since 1977, i.e. 40 years).
ECN: How does imec’s GaN-on-Si devices address the above needs?
Stoffels: Imec has evaluated two different gate architectures for use in space-based systems. One using a dielectric-based gate (MISHEMT) and another using a p-GaN gate. Using both topologies allows one to evaluate merits of both.
It was found that a MISHEMT-based architecture is susceptible to gate rupture, due to charge accumulation in the gate dielectric when an ionizing particle hits the material. The p-GaN architecture, on the other hand, does not suffer from gate rupture as it has a junction type of gate, which means that when charge is deposited in the gate, the junction will slightly open, allowing the charge to leak out of the component.
During our evaluation runs, together with our partners in the ESA project “GaN devices for space based DC-DC power conversion applications,” imec was able to prove that the p-GaN gate architecture is very robust to ionizing and non-ionizing radiation. The devices were able to survive under irradiation conditions, which would be equivalent to a dose they would receive over the course of 1,000 years in space.
Therefore, through this work we have shown the feasibility of a GaN-based power technology for operation is space with a highly reliable operation and moreover we have demonstrated the correct e-mode architecture to use, which would be a p-type gate architecture.
ECN: Where is the future of GaN-based technology in space headed?
Stoffels: The first application domain for GaN technology in space has been on RF devices. Through the work we have performed in the frame of an ESA project, we have demonstrated the feasibility of a GaN-based power technology in space. The requirements for this technology are much more stringent as it requires high voltage operation, i.e. high electrical field, which make the component more susceptible to irradiation defects. The work we have performed has shown that the GaN-based technology can be used reliably in space-based applications, which will enable to send more efficient power convertors into space, based on GaN technology.
First generation GaN power components will mainly be discrete components for the lower bus voltages. As the technology matures we can see GaN expanding to include also the medium range bus voltage. We foresee a similar trend as for terrestrial applications, were evolutionary improvements will increase the reliability and performance of the devices over time.
As designers get more familiar with the technology they will get more adept at optimizing the system and system size to better take advantage of the increased switching speed and/or efficiency which GaN offers. Furthermore, a move towards smart power systems can be expected, with higher levels of integration of components in a single form factor either by stacking or monolithic integration on a single die.
Filed Under: Aerospace + defense