MOUNTAIN VIEW, Calif.– Synopsys, Inc. (NASDAQ: SNPS), announced that STMicroelectronics has adopted Synopsys' TetraMAX® small delay defect (SDD) automatic test pattern generation (ATPG) and failure diagnostics solution to provide higher-quality manufacturing tests for its system-on-chip (SoC) products. Higher test quality enables defective parts to be identified earlier in the test process, lowering the cost of production testing. After extensive validation on manufactured designs, STMicroelectronics determined that the new TetraMAX SDD ATPG capability— which directly accesses precise timing information generated by Synopsys' PrimeTime® static timing analysis solution — improved the quality of product testing by identifying unique defect classes compared with standard at-speed pattern generation.
Small delay defects associated with nanometer processes can adversely affect timing-sensitive paths in a design, leading to circuit failures under certain conditions. Standard transition-delay ATPG lacks sufficient timing resolution to create tests that reliably detect these small added delays. The TetraMAX solution now processes precise timing information from the PrimeTime suite to generate small delay defect patterns and identify subtle defects that were previously undetectable. The new feature is consistent with existing design-for-test (DFT) methodologies and does not require design changes.
Filed Under: Software, Test + measurement • test equipment