Agilent Technologies to Showcase Bit Error Ratio Tester at DesignCon

Agilent Technologies Inc. announced it will demonstrate a 32-Gb/s bit error ratio tester with fast rise time and higher output amplitude at DesignCon (Booth 201) in Santa Clara Convention Center, Jan. 29-30.

Agilent has created remotely mountable pattern-generator heads for use with its N4960A BERTs (bit error ratio testers). The new pattern-generator heads (N4951B Option H32 and Option H17) feature improved rise and fall times of 12 ps to give ASIC designers the headroom necessary for signal fidelity at the test pin.

Tester

In addition, these new options integrate higher voltage output drivers into the pattern generator. This feature allows designers of optical transceivers to directly drive VCSELs, TOSAs and laser modulators for higher-data-rate applications such as 100-Gb Ethernet and OIF-CEI-28G, without the need for external driver amplifiers, associated interconnecting cables and power supplies.

As part of the N4960A BERT family, the new pattern generators are configured as remote heads connected to the BERT controller with a cable. This configuration allows the pattern generator to be located close to the device under test, minimizing the length of the signal cable, which helps minimize signal degradation.

Agilent Technologies
www.agilent.com

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