Kyoto, Japan – The 2015 Symposia on VLSI Technology and Circuits, an international technical conference focused on semiconductor technology and circuits, will be held at the Rihga Royal Hotel in Kyoto, Japan on June 15-18, 2015 (Technology) and June 16-19, 2015 (Circuits). The two Symposia technical programs are augmented with full-day short courses preceding each one – June 15 (Technology) and June 16 (Circuits). A single registration fee enables participants to attend sessions of both Symposia to encourage synergistic interaction among the participants.

A new feature of this year’s Symposium on VLSI Circuits is the introduction of new focus sessions on emerging VLSI system directions, and papers are being actively sought especially on topics of “big integration” from circuits within a chip, to the module/chassis level. Topics are expected to include: Internet of Things (IoT) sensing modules; industrial electronics, “big data” processing/storage systems; and robotics and smart cars.

Since 1987, the Symposia on VLSI Technology and Circuits have been held together to provide an opportunity for the world’s top device technologists, circuit and system designers to exchange leading edge ideas at the industry’s premier mid-year conference for microelectronics technology. Alternating its location each year between sites in the Japan and the US, the Symposia make it possible for attendees to learn about new directions in VLSI development.

The deadline for paper submissions to both conferences is January 26, 2015. Late-news paper submissions deadline for the Symposium on VLSI Technology is March 26, 2015; there is no late-news submission for the Symposium on VLSI Circuits.  Complete details for paper submission can be found online at: http://www.vlsisymposium.org/authors.html

The Symposium on VLSI Technology seeks original papers detailing breakthroughs in devices and processes including:

• Memory, logic, RF, analog, mixed-signal, I/O, high-voltage, imaging, MEMS, integrated sensors, and SOC (system-on-chip).
• Advanced gate stacks, channels, junctions, and contacts.
• Heterogeneous integration of non-Si materials/substrates on Si substrates.
• Advanced lithography and high-density VLSI patterning technologies.
• Beyond-CMOS functional devices with a path for VLSI implementation.
• Interconnect scaling and Cu alternatives; chip-to-chip including optical interconnects.
• Packaging technologies, through-silicon-vias (TSVs) and 3D-system integration.
• Advanced materials, device analysis, and modeling.
• Theoretical understanding, operation fundamentals and reliability issues related to the above devices.
• VLSI manufacturing concepts and technologies and yield optimization.

The Symposium on VLSI Circuits seeks original papers showcasing innovations and advances in the following areas:

• Digital circuits and processor techniques, including circuits and techniques for standalone and embedded processors.
• Memory circuits, architectures, and interfaces for volatile and non-volatile memories, including emerging memories.
• Clock generation and distribution for high-frequency digital and mixed-signal applications.
• Analog and mixed-signal circuits, including amplifiers, filters and data converters.
• Wireline receivers and transmitters, including circuits for inter-chip and long-reach applications.
• Wireless receivers and transmitters, including circuits for WAN, LAN, PAN, BAN, and inter-chip applications.
• Power management circuits, including battery management circuits, voltage regulators, energy harvesting circuits.
• Application-oriented circuits and VLSI systems, including imagers, displays and biomedical and healthcare applications.

Joint Technology and Circuits focus sessions feature invited and contributed papers highlighting major advances in materials, processes, devices, integration, reliability and modeling in advanced memories, 3D TSV integration, impact of technology scaling on advanced circuit design, including:

• Design in scaled technologies: Impact of advanced devices, structures, materials and interconnects on digital circuit performance, power, density; device design & process/technology optimization for analog/mixed-signal circuits. Also, the scaling of digital, memory, analog & mixed-signal circuits in advanced CMOS processes.
• Design enablement: Technology and design co-optimization for improved performance, yield, reliability, ultra-low voltage/power operation, density, and cost. Also, design-for-manufacturing (DFM), process-design co-optimization, and on-die monitoring of variability and reliability.
• Memory technologies: Discrete and embedded SRAM, DRAM and NVRAM (Flash, PCRAM, RRAM, STT-MRAM) technology/design co-optimization.
• 3D-integration (TSV): 3D-technologies and system co-optimization; power delivery and management; thermal management; inter-chip communications; SiP architectures and applications.

Best Student Paper Award

An award for best student paper at each Symposium will be chosen based on the quality of the papers and presentations. The recipient will receive a monetary award and a certificate at the opening session of the 2016 Symposium.

To be eligible, authors must be enrolled as full-time students at the time of submission, must be the lead author and presenter, and must indicate on the web submission form that theirs is a student paper.

Sponsoring Organizations

The Symposium on VLSI Technology is sponsored by the Japan Society of Applied Physics and the IEEE Electron Devices Society, in cooperation with the IEEE Solid State Circuits Society.

The Symposium on VLSI Circuits is sponsored by the Japan Society of Applied Physics and the IEEE Solid-State Circuits Society, in cooperation with the Institute of Electronics, Information and Communication Engineers and the IEEE Electron Devices Society.

For more information visit http://www.vlsisymposium.org/index.html.

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Filed Under: Energy management + harvesting, M2M (machine to machine)

 

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